1. Field of Invention
The present invention relates to a chip structure. More particularly, the present invention relates to an improved passivation structure for protecting an opening.
2. Description of Related Art
In the semiconductor fabrication, the production of integrated circuit (IC) is basically divided into three stages: wafer fabrication, IC fabrication, and IC package. Wherein, a die is accomplished after the steps of wafer fabrication, circuit design, circuit fabrication, and wafer cutting. For each accomplished die, cutting from the wafer, after the bonding pads of the die are electrically coupled to external signal lines, the die is packaged. The purpose of packaging the die is to prevent the humidity, thermal energy, and noise from affecting on the die. Also and, the package also provides a way for allowing the die to be electrically coupled to the external circuit, such as the printed circuit board or other packaging substrate. As a result, packaging process on the IC is accomplished.
Referring to FIG. 1, it is a top view, schematically illustrating a conventional structure of opening in a passivation layer. Each chip (or die) 100 cutting from the wafer has multiple bonding pads 110. The bonding pads 110 are arranged on the active surface 102 of the chip 100, so as to serve as a connection terminal of the chip 100 to the external signal. In addition, in order to prevent the outmost circuit pattern 116 of the chip 100 from being damaged due to contamination and mechanical effect, the active surface 102 of the chip 100 is formed with a passivation layer 104. This passivation layer 104 is formed by, for example, depositing an organic protection material or an inorganic protection material, for covering the active surface 102 of the chip 100. Also and, the passivation layer 104 covers over a portion of surface of the bonding pad 110 and the surface of a transmission line 114. The other portion of the top surface 112 of the bonding pad 110, which portion is not covered by the passivation layer 114, has an opening being formed, so as to serve as a connection via used by the subsequent fabrication processes of forming bump or bonding.
it should be noted that the opening 106 formed in the conventional passivation layer 104 usually is a circular opening. However, when the operation speed of the chip 100 increases, it is often that a large amount of current flows to the opening 106 above the bonding pad 110 via the transmission line 114, and is gathered at the profile surface 108 of the circular opening near to the transmission line 114. This causes that the current density at the profile surface 108 is larger than the current density at other peripheral surface, and further causes the phenomenon of current overcrowding. Even more severe, for the under bump metallurgic (UBM) layer above the bonding pad 110, the metallic atoms, under a long period of current affection, have gradually flowed away due to electromigration. It even further causes an open circuit between the bonding pad 110 and the UBM layer (not shown), and affects the lifetime of the chip 100.